Field
The present disclosure relates generally to memory circuitry, and more particularly, to a memory circuitry for selecting between memory outputs.
Background
Computers typically employ one or more processors capable of communicating with memory over a bus. Memory is a storage medium that holds the programs and data needed by the processor to perform its functions. Recently, with the advent of more powerful software programs, the demands for more memory have been increasing at an astounding rate. The result is that modern computers require a large amount of memory, which may be slower than the smaller memories. In fact, with respect to memory access speed, processors are currently able to generate memory accesses faster than the access speed of memory. This means that processors may have to wait for program instructions and data to be written to and read from memory.
One approach is to use a multi-bank memory. In one example, a multi-bank memory may generally be thought of as a series of separate memories integrated into the same piece of silicon. In another example, a multi-bank memory may generally be thought of as a series of separate memories integrated into the same memory system. Each memory bank may be addressed individually by the processor as an array of rows and columns. This may enable the processor to read or write program instructions and/or data from/to each memory bank in parallel. The processor may perform a read operation to a particular memory bank by placing a “read command” on the bus instructing the memory bank to retrieve the program instructions and/or data from a block of memory beginning at a specified address. The processor may perform a write operation to a particular memory bank by placing a “write command” on the bus instructing the memory bank to store the program instructions and/or data sent with the write command to a block of memory beginning at a specific address. Multi-bank memory may use a series of multiplexers to select between multiple memories. These multiplexers may generally need enable signals to be routed to them, which may use valuable routing resources.
Some memory systems may include pairs of memory cells. For each pair of memory cells in a set of memory cells, one memory cell of the pair of memory cells may be selected using a multiplexer (mux). The multiplexer may require that a selection signal be routed to the multiplexer. The selection signal may need to be routed to each multiplexer for each pair of bits. Routing a selection signal to a multiplexer for each pair of bits may require a large amount of routing resources on a die implementing the memory.